Location: Davis Auditorium
Speaker: Professor Dimitri A. Antoniadis
Faculty Host: Professor Debasis Mitra
Abstract: In this presentation I will first discuss the basic principles and the consequences of the so-called Moore’s and Dennard’s scaling laws of high performance integrated circuits with focus on the practical aspects of scaling of the MOSFET devices that constitute the core of logic electronics. While area scaling in the earlier days of integrated circuits led to commensurate area and clock-delay decrease, in the later years the rising powerdensity forced the incorporation of additional device performance boosters, such as channel strain. However, increasingly complicated device structures, such as 3-D channel geometries adopted in order to mitigate the deteriorating electrostatic integrity of transistors in the latest CMOS generations, have led to decreasing device performance making overall IC performance generation-to-generation enhancement more difficult to achieve. I will discuss these historical trends and then I will assess selected research directions involving new materials and new device operating principles that are considered as candidates to supplement or replace traditional silicon MOSFETs.
