Date: March 30, 2020
Time: 10:00am
Location: ZOOM
Speaker: Shiyu Su
Faculty host: Prof. Harish Krishnaswamy
Abstract: After decades of living with personal computers and smartphones, we are now in the era of artificial intelligence and the Internet of Things. Massive amounts of data are being generated and need to be received, stored, processed, and transmitted. Faster, smarter, and more reliable networks and devices are required to handle the variety and volume of data. On the other hand, after driving chip design for over 50 years, Moore’s law is running out of steam—technology scaling no longer leads to lower costs due to increasing design costs; furthermore, it is going to end in the near future.
In this talk, I will explore a new pathway to address this increasing supply-demand imbalance and, more importantly, to enable the next technological advance. Starting from the integrated circuit design, I will discuss the application of intensive digital signal processing (DSP) and mixed-signal techniques in analog circuit design for architectural-level breakthroughs with orders-of-magnitude improvement in system performance and flexibility. By effectively using time-domain signal processing, I was able to make fundamental analog blocks more “digital,” which maximally leverages the technology scaling and, at the same time, breaks the limitations of advanced technology nodes (i.e., low supply voltages). I will present several benchmarking design examples with silicon prototypes and measurement results. Then, I will present novel design methodologies and flows for analog design automation, leveraging the evolution of mostly digital circuit architectures and machine learning algorithms for considerably reducing chip design costs and iteration time. I will conclude the talk with my visions for new areas of research and applications enabled by these innovations in circuit architecture and design methodology.
Bio: Shiyu Su received the B.S. degrees from Beijing University of Post and Telecommunication, China and Queen Mary, University of London, UK, in 2011 and the M.S. and Ph.D. degree from University of Southern California (USC), Los Angeles, in 2013 and 2019, all in electrical engineering. His research interests include high-speed data converters, phase-locked loop, wireless and wireline transceivers and electronic design automation (EDA). Dr. Su was the recipient of IEEE Solid-State Circuits Society (SSCS) Predoctoral Achievement Award for 2017–2018, and the IEEE SSCS Student Travel Grant Award (STGA) in 2020. He is a Ming Hsieh Institute Scholar from 2019 to 2020. From 2015 to present, he serves as a reviewer for the IEEE International Symposium on Circuits and Systems (ISCAS), IEEE Transactions on Circuits and Systems I/II (TCAS), IEEE Transactions on Very Large-Scale Integrated Systems (TVLSI), IEEE Access, IEEE Solid-State Circuits Letters (SSC-L) and IEEE Journal of Solid-State Circuits (JSSC).
Event Contact: Eliese Lissner | [email protected]
