Speaker: Prof. Azita Emami, CalTech
Abstract:
The scalability of CMOS technology has driven computation into a diverse range of applications across the power consumption, performance and size spectra. Communication is a necessary adjunct to computation, and whether in the context of high-performance computing, mobile devices or biomedical implants, chip-to-chip communication can take up a significant portion of the overall system power budget. Today Data Center and High Performance Computing (HPC) performance is increasingly limited by interconnection bandwidth. Maintaining continued aggregate bandwidth growth without overwhelming the power budget for these large scale computing systems and data centers is paramount. The historic power efficiency gains via CMOS technology scaling for such interconnects have rolled off over the past decade, and new low-cost approaches are necessary. In this talk a number of promising solutions including Silicon-Photonic-based interconnects that can overcome these challenges will be discussed. In particular effective co-design of electronics and photonics as a holistic approach for reducing the total power consumption and enhancing the performance of the link will be presented.