Title: Rethinking Circuit Design: Strategies for Improving Efficiency
Speaker: Wanyeong Jung (Associate Professor, KAIST, Korea)
Time: 10-11am, Oct/28/2024
Location: EE conference room (1300 MUDD), Columbia University
Zoom link:
https://www.google.com/url?q=https://columbiauniversity.zoom.us/j/2096068112?omn%3D94913776364&sa=D&source=calendar&usg=AOvVaw2Csn35E6HD5LPULbzHVEct
Abstract: Traditional circuit development often involves significant design overhead, including extensive iterations to meet performance targets under varying conditions. Finding new circuit topologies to meet challenging design targets has become increasingly complex, with additional burdens in optimizing each component. This seminar discusses strategies for improving efficiency in circuit design by addressing these challenges. I will introduce design approaches and outcomes recently explored by my research team, focusing on analog and mixed-signal circuits based on simple and reliable mechanisms such as inverters and logic gates, as well as automation tools for generating and testing circuit topologies.
Bio: Prof. Wanyeong Jung received his Ph.D. in Electrical Engineering from the University of Michigan, Ann Arbor, in 2017. He is currently a faculty member in the School of Electrical Engineering at the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea. His research interests include low-power circuits and systems, energy-efficient edge computing, and the Internet of Things (IoT).