The conversion bandwidth of high-resolution (>16b ENOB) continuous-time delta-sigma modulators has largely been restricted to the audio range. In this talk, I will present the design, simulation and testing challenges encountered while attempting to increase the bandwidth of such converters by an order of magnitude, in the same process technology. I will discuss solutions to these problems, and present the design of a CTDSM that achieves 105 dB SNDR over a 250kHz bandwidth in a 180nm CMOS technology. The converter features the virtual-ground switched-resistor DAC, a chopped input integrator and FIR feedback, and consumes 24mW.
NT Alexander Institute Chair Professor
Department of Electrical Engg
Indian Institute of Technology, Madras
Chennai 600036 http://www.ee.iitm.ac.in/shanthi