Acknowledgements

This is a brand new project in this course and the logistics behind this project is fairly complex. We reached to many people for ideas, help and resources.

Great thanks to Prof. Peter Kinget for giving us this invaluable opportunity for our first tape-out experience. We've learnt an incredible amount of knowledge from this course and it helped us to build our skill stack. The project itself is an excellent example to show to employers.

Thanks Apple Inc. for sponsoring this project. We benefitted much more with our chip actually fabricated, instead of just running simulations. The testing and bring-up process allows us to consider the "bigger picture" of the project. We found chip testing a very rewarding, yet challenging process. We also want to thank Joao Cerqueira and other Apple engineers for participating in our design reviews, regular meetings and giving informative suggestions.

Many thanks to 6350 TA team for supporting our technical development and logistics. Special thanks to Alfred Davidson for supervising our project and offering immeasurable amount of help. We can't imagine doing this project without the help from Alfred. Thanks Ray Xu for holding a digital flow session. Thanks Hongzhe Jiang, Cade Gleekel, Mor Shimshi for discussing technical questions with us and coordinating the logistics. Thanks Richard Lee for helping us with reflow soldering and other lab testing issues.

Thanks Prof. Stephen Edwards for providing FPGA development board for us to estimate RTL resources. Thanks Prof. Matthew Ziegler for providing guidance at initial brain-storming stage about NPU. Thanks Rentao Wan and Zeyu Xiong for discussing primary NPU ideas with us and offering suggestions about TensorFlow.



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