Concept and Architecture
Voltage regulators play an important role in electronic systems. Low dropout voltage regulators (LDOs) are popular when output voltages are close to input voltages. There are various architectures of LDOs but traditional implementations use an operational-amplifier and a common-source power transistor as can be seen in Fig. 1.
Below are the bode plots of an op-amp and an integrator. It can be seen that the DC gain is limited for operational amplifier which leads to constant errors at the output. On the other hand, as the integrator based error-amplifier performs the time integration of the voltage, it can provide an infinite DC gain which leads to zero steady-state error at the output.
Several architectural improvements have been proposed for the performance of LDOs [4][7][8]. However, since these designs still rely on a operational amplifier to provide the necessary loop gain; this limits the accuracy as well as minimum possible quiescent current in operation. Integrator-based approach, on the other hand, consumes lower power, provides higher accuracy and can also support digital-controlled loop.
The architecture of the proposed LDO is presented in the figure below. The LDO output voltage VOUT is compared to the reference voltage VREF and converted into frequency with two differential voltage-controlled oscillators (VCOs); the phase-frequency detector compares the oscillator outputs and generates UP and DOWN pulses carrying the phase difference information which corresponds to the integral of the difference of the voltage inputs. The charge pump (CP), then, converts the pulses back to current, which is then converted to a voltage at the gate of the common-source power transistor which provides the load current and enables voltage regulation at the output.
Below is the architecture of the VCO-integrator-based LDO.
