System Overview
Fig 1. Block Diagram
Our chip enables a simple on-chip ECG testing system, making daily monitoring of heart-related conditions more portable and feasible. In a standard biosignal ECG system, we primarily focus on four types of signals. The first is the ECG signal, which is our main target. The other signals represent different interferences: DC offset introduced by electrodes, high-frequency noise, and 60Hz common-mode interference caused by power outlets.
We first acquire the ECG signal using external electrodes and wires, amplifying it through a first-stage instrumentation amplifier (INA) with a gain of 90 dB. An off-chip band-pass filter with a -60 dB stopband attenuation ensures that only the desired signal within the 0.01 Hz-150 Hz range remains. After the band-pass filtering, the amplitude of the DC offset and noise components is significantly reduced. Meanwhile, the classic bioamplifier with a fully differential structure and a common-mode rejection ratio (CMRR) of 90 dB further suppresses common-mode interference while accurately amplifying the differential ECG signal.
In the next stage, a programmable gain amplifier (PGA) further amplifies the clean signal after filtering, ensuring that it reaches the ADC's full range before entering a 10-bit SAR ADC. This amplification improves the signal-to-noise ratio (SNR). A buffer placed between the ADC and PGA serves as an isolator, ensuring that the stages do not interfere with each other.
For the 10-bit SAR ADC, we convert the analog signal amplified by PGA into a digital signal in preparation for subsequent signal processing. We use a 10 kHz sampling rate, which is divided by using five flip-flops frequency divider. The capacitive DAC consists of binary-weighted capacitors controlled by individual switches. The charge on each capacitor performs a binary search in conjunction with the comparator and the SAR logic. A strong-arm latch comparator, based on Razavi's design, is employed to minimize hysteresis and offset while maintaining a simple structure.
In the sample-and-hold circuit, we adopt a bootstrapping structure that reduces sampling errors and provides precise on-resistance. This approach minimizes distortion under different input conditions, ensuring higher accuracy in the ECG system.
Overall, we have realized a small and simple ECG system, which realizes the whole process of analog signal reception, amplification, and analog-to-digital conversion. In the final presentation for verification of our chip. We do the comparison on the ECG signal we get from Digilent output and compare it to the one we directly get from Apple Watch S8, to see if the basic function is working, like peak shape, compare within different testers for their amplitude of `R wave`, etc.