Introduction
This website documents the design, tape-out, and testing of a fully customized analog IC: a superheterodyne upconversion AM receiver. The chip was created as part of the Spring 2024 EE6350 VLSI Design Lab offered by Professor Peter Kinget and Columbia University, sponsored by Apple Inc., and was fabricated using TSMC 65nm CMOS technology.
MOTIVATION:
The motivation behind building a superheterodyne AM receiver is to gain experience in the system and analog circuit design of a standard receiver architecture while maintaining realistic goals that were achievable for the first full tape-out process. This is a fully analog system and is also challenging because the IF is at 10MHz. All circuit blocks on the chip are custom-designed, and all layout and top-level integration were done by hand.
PROJECT OVERVIEW:
The goal of the project is to build an AM Radio Receiver using superheterodyne upconversion intermediate frequency topology. The whole system should be able to capture the AM signals from the air, process, demodulate audio signals, and hear the targeted AM stations from a speaker. The IC is integrated into a fully custom-designed PCB to create a portable AM radio module powered by batteries.
The whole system block diagram can be partitioned into four sub-sections with respect to the following operating frequency:
- 1) AM radio frequency front end (Low Noise Amplifier and Mixer): 540-1700 kHz
- 2) Voltage controlled oscillator: 9-10.16 MHz
- 3) Intermediate frequency Programmable Gain Amplifier: 10.7 MHz
- 4) Audio baseband processing Demodulator: 0-10 kHz
This partition allows for independent testing and implementation of the respective receiver blocks during bring-up, test, and demonstration.
The die photo of our chip with corresponding block diagram of floorplan is shown below -- the culmination of our cumulative efforts in the Spring 2024 EE6350 VLSI Design Laboratory.
Chip die photo