REFERENCE

[1] Lecture Notes, EE6350 VLSI Design Laboratory, Dr. Peter Kinget, Columbia University in the City of New York, Spring 2023.

[2] R. JACOB Baker, "CMOS, Circuit design,Layout,and simulation"

[3] Y. Tokunaga, S. Sakiyama, A. Matsumoto, and S. Dosho, "An On-Chip CMOS Relaxation Oscillator With Voltage Averaging Feedback," IEEE Journal of Solid-State Circuits, vol. 45, no. 6, pp. 1150-1158, Jun. 2010, doi:10.1109/JSSC.2010.2048732.