System Overview
The digital clock application specifications are:
- Six 7-segment LED displays: 2 for the hours, 2 for the minutes and 2 for the seconds
- Setting mode for the minutes and the hours
- Reset mode
- Clock frequency from a crystal oscillator
- External clock frequency source
Fig. 2: Block Diagram of the chip
An input frequency of 32.768kHz which is 2^15 precisely, can be obtained either through the crystal oscillator or through an external frequency generator. Next, it is fed to a 15-stage frequency divider that produces the desired 1Hz frequency. Also, after 2 stages, an 8kHz frequency is fed to the enable decoder which is responsible for the enabling of each 7-segment display. The 1Hz frequency is fed to the seconds counter which produce 1/60Hz frequency for the minutes counter and then 1/3600Hz for the hours counter. A global reset function is applied to every flip-flop of our design and a setting mode is included in the hours and minutes counters. Finally, the counter outputs and the decoder outputs are fed to a decoder which produces the appropriate decimal digits. We will design our project in 130nm IBM technology.