Test Results

1) Scan: Figure 1 shows the designed scanning behavior of the chip. To debug this functionality, we took out two test pins, SCAN0 and SCAN19. Recall that as the chip scans, a given SCAN line should be enabled for 15 us, leave a 1 us non-overlap window, and then the following SCAN line should be enabled for 15 us. This continues for SCAN0 down to SCAN19, and then it wraps around back to SCAN0. Figure 2 shows exactly this behavior, SCAN19 is shown in green, it stays high for 15 us. Afterwards there is a 1 us gap, then SCAN0 in yellow is enabled.

Figure 1: Adjacent scan lines and dead time
Figure 2: Scan_Width

2) Instruction Format: Figure 3 demonstrates how instructions are input into the chip. In this image, we show the clock signal in yellow, the data input SDI in blue, and the SLAT signal which signifies the end of an instruction in green.

Figure 3: Instruction format

3) Serial Data Out (SDO): In order to verify the functionality of the shift register used to capture the instruction, we have also included the ability to monitor the bits streamed out of it via a pin named SDO. Figure 4 shows SDO in yellow and SLAT in green. SLAT is always low since no new instruction is being sent.

Figure 4: Serial data out

4) Rise and Fall time: Another test as shown in Figure 5 and 6 was to test the driving capability of our output buffers. This is important to characterize in case we want to daisy chain this display driver with another. To do this, we tested the rise and fall times of the output buffers when driving a 11 pF load.

Figure 5: Rise time
Figure 6: Fall time

5) Current Drive: Figure 7 shows how the current drive of the row and column transistors depends on the load. To test this, one of the LEDs in the display was replaced with resistors of varying resistances. From the figure, we see that the maximum current drive for low resistances is approximately 5.5 mA. The current starts to fall off around 200 Ohm.

Figure 7: Driver output current vs. Load resistance

6) PWM: The remaining images demonstrate the PWM capability of the chip for setting the LED brightness. Since each scan pulse is 15 us long, and the base clock period is 1 us, we are able to set 16 different brightness levels as the PWM duty cycle can vary from 15/15, 14/15, 13/15… 1/15, 0/15. In the following figures, the time that the PWM signal (yellow) time is shown to vary by 1 us at a time. In green, the PSCN signal which is used by the row driver is shown to have its length modulated according to the length of the PWM pulse.

Figure 8: Varying PWM Duty Cycle

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