We designed a display driver for a 20x20 LED display that has PWM capabilities for setting brightness and can be run with a clock frequency as high as 164 MHz. All necessary blocks are included on the chip from digital instruction capture, to memory, to PWM signal generation, all the way to the analog current drive devices used for turning on the LEDs. Our chip uses all 2.5V devices and all blocks have been hand designed at the schematic level, and then manually laid out.

Below, the primary specifications of the uD6350 are tabulated at 1 MHz clock frequency.

Parameter Value
Technology TSMC 65 nm
Supply voltage 2.5 V
Maximum supply current 22.2 mA
Standby supply current 8.2 mA
Maximum power draw 82.1 mW
Standby power draw 30.34 mW
Clock frequency 1 Hz - 164 MHz
Maximum display refresh rate 512.5 kHz

Special thanks to:

Professor Peter Kinget, and our TA's Peter Barac, Armagan Dascurcu and Ray Xu for their guidance throughout this project and sharing their deep knowledge of CMOS technology and tapeout experience with us.

Professor John Kymissis for his consultation on display architecture and driver design.

Apple for their critique in design reviews and sponsoring fabrication of the chips for this course.

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