SYSTEM DESIGN
SYSTEM OVERVIEW:
Power amplifiers have fundamental trade-off between linearity and power-efficiency. Audio power amplifiers are expected to amplify and reproduce input audio signals with
good faithfulness. The faithfullness of reproduction is quantified by distortion added by the amplifier. Also since audio amplifiers are widely used in mobile or portable application, they are expeceted to have
good power efficiency.
Figure 1: System level block diagram
Key considerations or specifications for the design Class-D amplifiers include
1.INPUT SIGNAL FREQUENCY RANGE
Since the amplifier is intended for audio applications, the input frequency is expected to be between 20Hz and 20kHz.
2. INPUT SIGNAL AMPLITUDE
Since this is a closed loop design, the gain of the system is set by the feedback fraction. In this design, we chose the feedback fraction to be 1 so that the differential gain of the system is unity. The single-ended to differential converter offers a further gain of 2, so that the effective gain of the system from single-ended input to differential output is 2. Since the maximum output amplitude can be VDD, the input amplitude needs to be limited to VDD/2.
3. INTEGRATOR CUT-OFF FREQUENCY
The integrator cut-off frequency needs to be low enough that it rejects spurious tones near the switching frequency while simultaneously being high enough to let all of the input frequencies pass through unattenuated. In this design, this was set to be 20kHz.
4. PULSE WIDTH MODULATION FREQUENCY
The most important consideration while choosing the PWM frequency is the tradeoff between power dissipation and the suppression of high-frequency tones by the loop. As the frequency of the PWM increases, the integrator does a better job of suppressing the spurious tones but since digital power dissipation is proportional to f*C*(VDD^2), for a given capacitive load and supply voltage, the power dissipation goes up linearly with frequency. This reduces the efficiency of the system. On the other hand, if the PWM frequency is reduced, the efficiency improves, but now the integrator cannot reject the spurious tones near the PWM frequency as effectively. The PWM frequency was chosen to be tunnable from 200kHz - 800kHz. For an integrator cut-off frequency of 20kHz, this offers an attenuation of approximately 20dB at the PWM frequency.
