References

[1] K. Y. Kim, D. Z. Pan and R. Gharpurey, "A Broadband Spectrum Channelizer With PWM-LO-Based Sub-Band Gain Control," in IEEE Journal of Solid-State Circuits, vol. 57, no. 3, pp. 781-792, March 2022.
[2] G. Van der Plas et al., "Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter," Proceedings 37th Design Automation Conference, pp. 452-457, 2000.
[3] Chi-Hung Lin and K. Bult, "A 10-b, 500-MSample/s CMOS DAC in 0.6 mm^2," in IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 1948-1958, Dec. 1998.
[4] M. Ni et al., "A high-speed analog front-end circuit used in a 12bit 1GSps pipeline ADC," 2015 IEEE 11th International Conference on ASIC (ASICON), pp. 1-4, 2015.
[5] J. Arias et al., "Low-power pipeline ADC for wireless LANs," in IEEE Journal of Solid-State Circuits, vol. 39, no. 8, pp. 1338-1340, Aug. 2004.
[6] C. Lee, M. H. Jang and Y. Chae, "A 1.2V 68µW 98.2DB-DR Audio Continuous-Time Delta-Sigma Modulator," 2018 IEEE Symposium on VLSI Circuits, pp. 199-200, 2018.
[7] J. Naylor, "Testing digital/analog and analog/digital converters," in IEEE Transactions on Circuits and Systems, vol. 25, no. 7, pp. 526-538, July 1978.
[8] P. Sandborn, FMCW Lidar: Scaling to the Chip-Level and Improving Phase-Noise-Limited Performance, U.C.Berkeley Ph.D. Thesis.
[9] M. Jankiraman, FMCW Radar Design, Artech, 2018.



Back to top