Columbia presents four papers at the 2016 IEEE International Solid-State Circuits Conference (ISSCC).
Four papers from Columbia University’s Electrical Engineering department have been accepted to the 2016 IEEE International Solid-State Circuits Conference (ISSCC). The ISSCC is the international flagship conference in the field of solid-state integrated circuits design where the latest advances in integrated electronic circuits are introduced. Columbia IC designers have been regular contributors to the ISSCC for decades and this marks the third year in a row that our EE department has presented three or more papers at ISSCC. The papers feature research from the research groups of Professors Krishnaswamy, Seok and Kinget. In addition, Peter Kinget will be participate in an Evening Panel titled “Do We Need to Downscale Our Radios Below 28nm”, which will be moderated by Harish Krishnaswamy. Harish Krishnaswamy will also chair a paper session titled “RF-to-THz Transceiver Techniques.
A first paper titled “Receiver with Integrated Magnetic-Free N-Path-Filter-Based Non-Reciprocal Circulator and Baseband Self-Interference Cancellation for Full-Duplex Wireless” is authored by Jin Zhou, Negar Reiskarimian and Prof. Harish Krishnaswamy of the CoSMIC lab. It describes a receiver integrated circuit (IC) intended for full-duplex wireless, an exciting new wireless communication paradigm where the transmitter and the receiver operate at the same time and at the same frequency. Since frequency and temporal resources are used to the fullest extent possible, full duplex wireless potentially doubles network capacity in the physical layer, while offering numerous other benefits at the network layer. The challenge associated with full-duplex wireless is the tremendous transmitter self-interference, or echo, at the receiver input. This self-interference can be as high as a billion times more powerful than the desired signal to be received. This paper builds on Reiskarimian’s work on an integrated circulator that allows the transmitter and the receiver to share the same antenna, while providing isolation between the two, allowing for compact-form-factor full duplex radios. In addition, Jin developed analog baseband and digital self-interference cancellation techniques that suppress the echo to the tune of nearly one part per billion. The aspects make this the first full-duplex receiver IC reported that achieves the levels of echo cancellation required for full-duplex wireless. This research is a part of the Columbia FlexICoN project that holistically addresses the cross-layer co-design of full-duplex networks from the physical layer to the upper reaches of the network layer. At thei ISSCC plenary session, Jin Zhou will also receive a prestigious IEEE SSCS Pre-doctoral Achievement Award.
Linxiao Zhang of the CoSMIC lab will present a paper titled “A Scalable 0.1-to-1.7GHz Spatio-Spectral-Filtering 4-Element MIMO Receiver Array with Spatial Notch Suppression Enabling Digital Beamforming” that is also co-authored by Prof. Harish Krishnaswamy. Conventional multiple-antenna receivers, also called phased arrays, offer numerous benefits including sensitivity improvement and the ability to suppress interferers based on their angle of arrival. While the past decade has seen significant research on the integration of phased arrays in IC technology, of late, there has been interest in multiple-input, multiple-output (MIMO) technology where advanced space-time array processing techniques are utilized to significantly enhance data rate and/or wireless link reliability. MIMO requires “digital” receiver arrays, where each receiver’s signal is digitized without any analog or RF array processing, as MIMO space-time array processing algorithms are only practically realizable in the digital domain. As a result, the analog and RF portions of a digital MIMO receiver array remain exposed to interference, significantly increasing their dynamic range and power consumption requirements. Linxiao Zhang developed a novel MIMO receiver array architecture that combines analog and RF spectral filtering with spatial interference suppression, allowing digital MIMO receiver arrays to suppress an interferer based on either its frequency or its angle of arrival, thus recovering analog and RF interference mitigation. The IC prototype will also be demonstrated at the ISSCC demo session in a live wireless imaging experiment that showcases the new interference mitigation capability.
Jianxun Zhu from Prof. Peter Kinget’s research group will present a paper titled “A Very-Low-Noise Frequency-Translational Quadrature-Hybrid Receiver for Carrier Aggregation.” This research focuses on programmable RF receivers for advanced mobile wireless communication terminals for 4G LTE-Advanced or future 5G and cognitive radio networks. With the ever-increasing demand for data throughput in the modern smart phones, more RF spectrum resources need to be aggregated to enable a larger bandwidth. However, the available spectrum is fragmented into tens of different frequency bands, and the available band combinations strongly depend on regional spectrum management policies. In the current state of the art, it is extremely difficult to concurrently receive weak signals from multiple frequency bands with such high level of system flexibility. Zhu developed a novel radio architecture that is able to receive signals from a single wideband antenna with multiple independent concurrent receivers each with programmable gain, bandwidth, power consumption and sensitivity so that performance can be optimized according to signal conditions. Under highest sensitivity mode, the receiver has an exceptionally low noise figure of 1dB. Furthermore, multiple receivers can be daisy-chained to extend the maximum number of frequency bands that can be aggregated. These features are key for next generation cognitive wireless communication technologies where highly flexible radios are needed to adapt to the complex RF environment and application context. Zhu will also be doing a live demo of his receiver at the 2016 ISSCC and show case the support of six-band aggregation with his concurrent receivers. Jianxun Zhu will also receive a prestigious IEEE SSCS Pre-doctoral Achievement Award at the ISSCC plenary session.
Doyun Kim of the VLSI Design Lab led by Prof. Mingoo Seok, will present a paper titled “Fully Integrated Low-Drop-Out Regulator Based on Event-Driven PI Control” in the Low Power Digital Session. The paper describes a technique that enables a voltage regulator to be fully integrated on a chip without an off-chip component (capacitor), which is considered as the major overhead of such a regulator. Given that modern system-on-chip (SoC) designs employ more than 50 power domains many of which are often implemented by low-drop-out (LDO) regulators, it is a significant gain in cost and complexity to eliminate off-chip components. To accomplish this, Kim proposed novel event-driven control systems, which achieve ultra-short feedback latency while keeping the power dissipation of the control systems sufficiently small. Based on these novel systems, they prototyped a digital low-drop-out regulator, which outperforms the existing state of the art by ~3X in terms of the capacitor-size and power-dissipation trade-off.