Welcome

 

Welcome to VLSI Lab at Columbia University. We work on novel design techniques and methodologies for better energy efficiency, performance and robustness of highly integrated circuits and systems. We build and charaterize hardware, often in the form of integrated circuits, like the one of the Intel microprocessors in the picture (or smaller). Please visit our research page and publication list to get a sense of research that we are involved with. We are also collaborating with faculty members in Columbia Integrated Systems Lab, Computer Engineering Program and EE department.

Latest news

Nov, 2016: Two papers titled “Extending Memory Capacity of Neural Associative Memory based on Recursive Synaptic Bit Reuse” and “Microwatt End-to-End Digital Neural Signal Processing Systems for Motor Intention Decoding” are accepted for Design, Automation, and Test in Europe (DATE). Congrats Tianchan and Zhewei. The first paper is a collaborative work with Prof. Xiaoyang Zeng (Fudan University) and the second one is with Drs. Chisung Bae, Joonseong Kang, Sang Joon kim (all Samsung Advanced Institute of Technology).
Oct, 2016: The paper titled “In-Situ Error Detection Techniques in Ultra-Low-Voltage Pipelines: Analysis and Optimizations” is accepted for IEEE Transactions on VLSI Systems (TVLSI). Congrats Wei and Josh. This is a collaborative work with Profs. He and Mao (SJTU).
Oct, 2016: The paper titled “A 0.5V-VIN 1.44mA-Class Event-Driven Digital LDO with a Fully-Integrated 100pF Output Capacitor” is accepted for IEEE International Solid-State Circuits Conference (ISSCC). Congrats Doyun!
Aug, 2016: The paper titled “Neural Network based Seizure Detection System using Raw EEG Data” is accepted for IEEE International SoC Design Conference (ISOCC) as a part of the special session on Computational Devices, Circuits and Systems. Congrats Tianchan. This is a collaborative work with Prof. Letian Huang (UESTC) and Prof. Xiaoyang Zeng (Fudan Univ).
Aug, 2016: Two papers titled “A 0.35V 1.3pJ/Cycle 20MHz 8-Bit 8-Tap FIR Core Based on Wide-Pulsed-Latch Pipelines” and “Triple-Mode Photovoltaic Power Management: Achieving High Efficiency against Harvesting and Load Variability” are accepted for IEEE Asian Solid-State Circuits Conference (A-SSCC). Congrats, Wei, Jiangyi, and Josh. The former is a collaborative work with Profs. He and Mao (SJTU) and the latter is with Profs. Kymissis (Columbia) and Seo (ASU).
Jun, 2016: The paper titled “Energy-Efficient Neuromorphic Classifier,” is accepted for Neural Computation. This is a collaborative work with Prof. Fusi.
Jun, 2016: The paper titled “Ultra-Compact and Robust Physically-Unclonable-Function based on Voltage-Compensated Proportional-to-Absolute-Temperature Voltage Generators,” is accepted for IEEE Journal of Solid-State Circuits (JSSC). Congrats, Jiangyi.
Jun, 2016: The paper titled “High-Accuracy Compressed Sensing Decoder Based on Adaptive (l0,l1) Complex Approximate Message Passing: Cross-Layer Design,” is accepted for the publication in the IEEE Transactions on Circuits and Systems I (TCAS-I). Congrats, Le. This is a collaborative work with Prof. X. Wang.
Jun, 2016: The paper titled “Register File Circuits and Post-Deployment Framework to Monitor Aging Effects in Field,” is accepted for the publication in the IEEE European Solid-State Circuits Conference (ESSCIRC). Congrats, Teng. This is a collaborative work with Prof. Kinget.
May, 2016: The paper titled “Temporarily Fine-Grained Sleep Technique for Near- and Sub-Threshold Parallel Architectures,” is accepted for the publication in the IEEE Transaction on VLSI Systems (TVLSI). Congrats, Joao.
Mar, 2016: The paper titled “1.74-uW/ch, 95.3%-Accurate Spike-Sorting Hardware based on Bayesian Decision,” is accepted for publication in IEEE Symposium on VLSI Circuits (VLSI). Congrats Zhewei, Joao, and Josh.
Mar, 2016: The paper titled “A 450mV Timing-Margin-Free Waveform Sorter based on Body Swapping Error Correction,” is accepted for publication in IEEE Symposium on VLSI Circuits (VLSI). Congrats Josh and Joao.
Mar, 2016: The paper titled “Energy-Efficient Hybrid Analog/Digital Approximate Computation in Continuous Time,” is accepted for publication in IEEE Journal of Solid-State Circuits (JSSC). Congrats Ning, Yipeng, and other students. This is a collaborative work with Profs. Tsividis and Sethumadhavan.
Mar, 2016: The paper titled “Evaluation of an Analog Accelerator” is accepted for publication in IEEE International Symposium on Computer Architecture (ISCA). Congrats Yipeng and Ning. This is a collaborative work with Profs. Sethumadhavan and Tsividis.
Feb, 2016: We receive a grant from Office of Research Initiative for the research on learning machine systems. We appreciate the support.
Dec, 2015: We receive a grant from SK Hynix for IC design research. We appreciate the company's support.
Nov, 2015: We will present Our on-going work on adaptive design at the 2016 ISSCC Student Research Preview (SRP) session (Student work in progress). Congrats Josh and Joao!
Oct, 2015: The paper titled “Fully-Integrated Low Drop-Out Regulator based on Event-Driven PI Control” is accepted for publication in IEEE International Solid-State Circuits Conference (ISSCC). Congrats Doyun!
Aug, 2015: The paper titled “Ultra-compact and Voltage-Scalable Temperature Sensor Design for Dense Dynamic Thermal Management Techniques” is accepted for publication in IEEE Journal of Solid-State Circuits (JSSC). Congrats Teng and Josh!
Aug, 2015: Prof. Seo from ASU will present the joint work at IFIP/IEEE Internationl Conference on VLSI and System-on-Chip (VLSI-SoC) in his invited presentation titled “Digital CMOS Neuromorphic Processor Design Featuring Unsupervised Online Learning”.
Jul, 2015: The paper entitled “Energy-Optimal Voltage Model Supporting a Wide Range of Nodal Switching Rtes for Early Design-Space Exploration” is accepted for publication in IEEE International Conference on Computer Design (ICCD). Congrats Doyun and Jiangyi.
Jul, 2015: The research proposal to Samsung GRO on ultra-low-power microsystem design technology is awarded.
Jun, 2015: The paper titled “A 30.1μm2, < ±1.1°C-3σ-Error, 0.4-to-1.0V Temperature Sensor based on Direct Threshold-Voltage Sensing for On-Chip Dense Thermal Monitoring,” is accepted for publication in IEEE Custom Integrated Circuits Conference(CICC). Congrats Josh!
Jun, 2015: An NSF SBIR-I proposal which Prof. Seok will contribute to as a consultant is awarded.
May, 2015: The paper titled “Continuous-Time Hybrid Computation with Programmable Nonlinearities” is accepted for publication in European Solid-State Circuits Conference. Congrats Ning and other co-authors. This is a collaboration work with Profs. Tsividis and Sethumadhavan.
Apr, 2015: The paper titled “A Neuromorphic Neural Spike Clustering Processor for Deep-Brain Sensing and Stimulation Systems,” is accepted for publication in IEEE International Symposium on Low Power Electronics and Design (ISLPED). Congrats Beinuo and Zhewei!
Apr, 2015: Prof. Seok serves as a TPC track co-chair for 2015 ISLPED and as a TPC member for 2015 S3S.
Mar, 2015: The paper titled “Variation-Tolerant Near-threshold Microprocessor Design with Low-Overhead, Within-a-Cycle In-situ Error Detection and Correction Technique,” is accepted for publication in IEEE Journal of Solid-State Circuits (JSSC). Congrats Josh!
Mar, 2015: Zhewei Jiang received the scholarship for a part of his PhD study from Wei Family Private Foundation. Congrats Zhewei!
Mar, 2015: We will present a paper titled “A 3.07um^2/bitcell Physically Unclonable Function with 3.5% and 1% Bit-Instability across 0 to 80oC and 0.6 to 1.2V in a 65nm CMOS” at 2015 IEEE Symposium on VLSI Circuits (VLSI). Congrats Jiangyi!
Mar, 2015: We will present a paper titled “Co-Development of Complementary Technology and Modified-CPL Family for Organic Digital Integrated Circuits” at Material Research Society (MRS). Congrats Fabio. This work is a collaboration with Prof. Kymissis group.
Feb, 2015: We will present a paper titled “A Low Power Unsupervised Spike Sorting Accelerator Insensitive to Clustering Initialization in Sub-optimal Feature Space” at 2015 ACM/IEEE/EDAC Design Automation Conference (DAC). Congrats Zhewei!
Jan, 2015: Prof. Seok starts to serve as an associate editor for IEEE Transaction on VLSI Systems
Jan, 2015: Prof. Seok receives 2015 NSF CAREER award
Oct, 2014: Teng Yang and Doyum Kim will present their work on the in-situ technique to in-field monitor NBTI degradation in a register file in 2015 ISSCC. Contrats!
Jul, 2014: Prof. Seok is invited for a talk by International Symposium on New Frontiers in Scientific Innovation, organized by Korea Foundation of Advanced Studies (KFAS) and Chosun Ilbo.
Jul, 2014: Prof. Seok gives a talk in Seoul National University, Korea Advanced Institue of Science and Technology (KAIST), Samsung Electronics, and SK-Hynix, all in South Korea.
Apr, 2014: Prof. Seok co-organizes an workshop on Connected, Autonomously Powered Systems. link
Apr, 2014: We will present two papers in 2014 International Symposium on Low Power Electronics and Design (ISLPED). Congrats Josh!
Mar, 2014: We will present a paper on the ultra-low-power variation-tolerant microprocessor in 2014 Symposium on VLSI Circuits (VLSI). Congrats Josh!
Feb, 2014: We will present a paper on the in-field and direct aging monitoring technique in 2014 Design Automation Conference (DAC). Congrats Jiangyi!

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