- Email:
- Put EE6901 in the subject of your message; cc: the TA on your message as much as possible.
Webpage: http://www.ee.columbia.edu/~kinget/EE6901_S10
Office Hours: TBD
Teaching Assistant: TBD
Prerequisite:
- Instructor's permission
- When contacting the instructor make sure to outline your prior experience in circuits and systems, in particular in IC design. E.g., have you taken courses like ELEN 4312, 4314, 6312 or 6314 as well as 4321 or similar courses at your prior school? Check the websites/syllabi of these Columbia courses and comment in detail. It is not necessary to have taken all these classes as a pre-requisite but a solid background in circuits and systems will be required for this advanced class.
- Qualified student must have a very good understanding of circuit and system analysis, electronics, electronic devices and models, and integrated circuit design.
- Students need to be familiar with circuit and system simulation (Matlab and Spectre) and CAD tools (Cadence design environment).
- This class will cover advanced topics in integrated circuit design, in particular the design of advanced phase locked loops. This class should NOT be your first design class.
Course Topics
(subject to change, under development)
The course will focus on both circuits and systems aspects of PLLs since successful PLL design requires a good understanding of the design aspects at both levels.
The course is self-contained but will assume an exposure to basic PLL concepts and building blocks. The introductory material will be covered at a relatively high pace to leave time for more advanced topics.
Note: topics will not necessarily be covered in the order listed here.
- PLL Concepts
- basic PLL operation
- type I and type II PLLs
- Analog PLLs
- Digital PLLs
- PLL Architectures
- Analog PLLs
- Integer-N PLLS
- Fractional-N PLLs
- Impact of circuit non-idealities
- Digital PLLs
- Analog PLLs
- PLL Performance
- jitter and phase noise modeling, simulation and measurement
- Building Block Design
- oscillators
- dividers
- phase-frequency detectors and charge pumps
- filters
- delta-sigma modulators
- time-to-digital converters
- PLL Applications
- frequency synthesis
- clock synthesis
- generation of phase or frequency modulated signals
- clock and data recovery (if time permits)
Students will be assigned (research) papers on a particular topic to read and present in class.
An extensive project is an integral part of the course. They will be asked to demonstrate the used concepts or circuits in simulation and to present their project to the class.
Design tools
Computer-aided analysis techniques are extensively used. The latest industry-grade CAD tools and simulation tools (Cadence Spectre transistor levels simulations and analog VHDL, and Matlab) are used in this class. See the Design Tools page.
Verilog-A modeling of PLL building blocks will be covered in the class. No prior Verilog-A modeling experience is required.
Textbook:
The course is based on a combination of instructor's notes, technical papers and textbook chapters.
Grading:
(Subject to change)
Class presentation of research paper(s) 1/3
Design Project and Class presentation 1/3
Midterm (written) 1/3