News

(December 2024) We had a succesful demo session and the groups are posting their videos and websites on the 2024 class website. Go and take a look. Many impressive chip designs.

(June 2024) We taped-out our Spring 2024 class projects!! Three PPG chips, an ECG chip, an AM radio, a potentiostat, a sensor readout, a radar baseband, an NPU and last but not least, a RISC-V processor have been sent out for fabrication. Congratulations to all teams for completing their tape-out and many thanks to the teaching assistants for all their help and dedicated mentorship.

tapeout panel

Intro

The EE6350 VLSI Design Lab is a graduate course that focuses on the design, simulation, layout, verification and tape-out of an IC design. An industrial sponsor is sponsoring the fabrication of the chips in a 65nm CMOS foundry technology. The foundry will fabricate the chips that students subsequently test in the Fall.

Overview Video and Article

The Engineering School made a video about the demo session for the 2022 class and an article was published in the IEEE Solid-State Circuits Magazine describing the goals, approach and organization of the class:
SSCS Magazine Summer 2023

YouTube Channel

Students make a video presentation demonstrating the operation of their chip and describing the design details. The videos are collected on our YouTube channel

Class Pages

Students document their design in a project webpage which are posted on the yearly class webpages linked in the banner above.

Industrial Sponsor

In 2022 and 2023, in 2024 the fabrication and the packaging of the chips is sponsored by Apple Inc. IC design engineers from the sponsor participate in design reviews and mentor teams; they also offer prizes to the best designs. In 2016, 2015 and 2014, the fabrication and packaging was provided through the instructional support program of MOSIS.