From http://www.ieee-cicc.org/Conference%20Events/panel.html

Session 22 - Evening Panel Discussion
Pine Ballroom, Tuesday, September 23, 8:00 pm

Are (Analog) Device Models Really That Bad, Or Are They Just A Convenient Excuse?

Organizer/Moderator: Peter Kinget, Columbia University

Panelists:
Yu-Tai Chia, Dept. Mgr, SPICE Modeling, TSMC
Daniel Foty, President, Gilgamesh Associates
Weidong Liu, Senior R&D Mgr., Mixed-Signal Simulation & TCAD, Synopsys
Colin McAndrew, Director, Enabling Technology, Motorola
Ali Niknejad, Professor, University of California, Berkeley
Yannis Tsividis, Professor, Columbia University
Pieter Vorenkamp, Sr. Director, Analog & RF Micro-Electronics, Broadcom Corp.

The poor accuracy of device models is a constant complaint of circuit
designers. Significant research has been done to improve device model
equations which should alleviate these complaints. So, what is at the
origin of this perpetual modeling debate?

Are the logistics of model extraction and parameter generation too
complicated so that the most advanced tools are not available to
product designers? Is the pace of technology change too fast for
stable models to emerge? Is the nature of our industry that we
constantly push (past) the limit, so that this problem will never go
away? Maybe the advantage of good circuit models is not significant
enough towards the product success so that management does not want to
put resources in modeling. Or, are the models just an easy excuse for
missed deadlines and requirements?