If you haven't read the CAD tool information page, READ THAT FIRST.

In this handout, we will learn how to extract layout with Assura RCX and simulate (with HSPICE) from the extracted layout.

• Before beginning, we sure that you have run Assura LVS the layout and the result was "clean".   If this is the case, then to run Assura RCX, choose Assura --> Run RCX.... Change the defaults on this form as follows:
  "Extract" you can change to capacitance and resistance.  This will extract both capacitors and resistors for interconnect wire.  If you keep the default of "Decoupled," these will all be grounded caps.
  "Output" field should be "Extracted View".  The extraction results will now be stored as an "av_extracted" view in Cadence, which will enable us to easily netlist it for HSPICE
• Ready to run RCX. Hit "OK".
• A progress form will appear showing Assura RCX is in progress. Wait for a few seconds until the RCX  run is over.

After completing extraction, you are ready to simulate your extracted results. Now, your circuit simulation environment should be set up so that your "device-under-test" (DUT) is a separate symbol in a schematic in which the stimulus is applied to the pins of the symbol.  From this simulation schematic, bring up the Analog Environment window by choosing Tools -> Analog Environment. Now choose Setup -> Environment. On the Setup Environment form, on the "Switch View List" line, add the field "av_extracted" right before "schematic."  Now simulate you design as you did before.  In this case, your "av_extracted" view will be netlisted instead of the "schematic" view, bringing in all the parasitics you extracted.