Welcome to the home page of EE6350 VLSI Design Lab for Spring 2023.
This graduate course focuses on the design, simulation, layout,
verification and tape-out of an IC design. Our industrial sponsor is
funding the fabrication of the chips in a 65nm CMOS foundry
technology. The foundry fabricates the chips that students
subsequently test in the Fall.
The TAs for the course were Hongzhe Jiang and Mor Shimsi. The course asistants were Armagan Dascurcu and Alfred Davidson. In Fall, Cade Gleekel also assisted students with PCB design and chip testing.
These projects could not have been successful without the dedication and hard work of the students and TAs/CAs. Kudos to them!
We thank Apple Inc. for sponsoring the fabrication of the chips. Many thanks to Dr. Joao Cerqueira for being the liaison to Apple for the course. Many thanks also to the EE department for supporting the teaching staff and to Prof. Ken Shepard, Richard Lee, Kington Chan, and Yoel Rio for their assistance with the course.
Enjoy the presentation videos and project websites and do not hesitate to send us your feedback. The contact information of the students is included.
Peter Kinget, Dec. 2023