Welcome to the home page of EE6350 VLSI Design Lab for Spring 2015.
This graduate course focuses on the design, simulation, layout, verification and tape-out of an IC design. MOSIS is offering access to an IBM 0.18um CMOS technology for this course. MOSIS fabricates the chips that students subsequently test.
Spring 2015 Project Reports and Videos
Analog filter synthesized with a digital flow
Publication: S. Newton and P. R. Kinget, "A 4th-Order Analog Continuous-Time Filter Designed Using Standard Cells and Automatic Digital Logic Design Tools," IEEE International Symposium on Circuits and Systems (ISCAS), May 2016.
VCO-based low-dropout voltage regulator
Sanket Gupta and Zhongjie Dai
Publication: Z. Dai, S. Gupta, S. Kalani and P. R. Kinget, "3.7uW 0.8V VCO-Integrator-Based High-Efficiency Capacitor-Free Low-Dropout Voltage Regulator," IEEE International Symposium on Circuits and Systems (ISCAS), May 2016.
Class-D amplifier with off-the-shelf FM radio
Alexandar Gazman and Hang Guan
PPG heart-rate monitor
Qirui Xu and Jian Shao
Yandong Li and Yuanpei Zhang
Jihua Li and Yufei Wang
PPG heart-rate and respitory-rate monitor
Girish Ramakrishnan and Olivier Jin