EE4303 Spring 2002
Homework #6 (due
April 11 2002):
Take the 0.5um CMOS opamp
example from the notes and perform the following design steps and simulations:
- Use the TSMC 0.25um CMOS technology
installed on the CU lab computers
- Use the 3.3V nominal VT devices (the
technology offers a whole range of transistor types: 2.5V or 3.3V,
nominal, low, medium … VT, make sure you select the correct ones)
- Change IBIAS to 150uA, but do not
change any of the transistor sizes.
- Change CLOAD to 5pF
- Simulate the DC operating point of the opamp;
report node voltages and transistor operating conditions
- Change the value of the compensation capacitor
CC to have a phase margin of 60 degrees.
- Simulate the AC open loop response of the
opamp (i.e. the loop gain for a unity feedback configuration). Report the
DC gain, the first pole frequency, the unity gain frequency and phase
margin, and the phase crossover frequency and gain margin.
- Put the OpAmp in a unity gain follower
configuration and simulate the transient step response for a step input
of from 1.5V to 1.6V, 1.5V to 1.4V, 1.5V to 2.5V and 1.5V to 0.5V etc.).
Report graphs for each of the 4 stepresponses (i.e. plots of v(out)