Welcome to the home page of EE6350 VLSI Design Lab for Spring 2014.

This graduate course will focus on the design, simulation, layout, verification and tape-out of an IC design. MOSIS is offering access to an IBM 0.18um CMOS technology for this course. MOSIS will fabricate the chips which students will subsequently test.

More details about the course organization are under Syllabus

The lectures will be held in MUDD 1127


How to register for this course