Peter Kinget -- Fall 2004
In order to get access to the design tools and technology information, all students must download, print and sign a MOSIS non-disclosure form; mail it (address on homepage) or leave it in my Mailbox in the EE office; without this form your computer account cannot be activated. Please respect this confidentiality agreement and keep the IC technology information (models, process information) strictly confidential.
To set up your computer account and to enable access to the VLSI Teaching Computing Lab (Mudd 1218) you need to send an email with: first name, last name, pid, uni, ssn, on-campus/off-campus at the beginning of the term. You can also contact the lab manager, John Kazana, 1312 Mudd Building, (212) 854-2427, email@example.com
ILAB Hosts (Mudd 1235): micro1.ilab.columbia.edu, micro2.ilab.columbia.edu, to ...., micro15.ilab.columbia.edu
CISL Hosts (Mudd 1218): thebes.cisl.columbia.edu, nemea.cisl.columbia.edu, odessa.cisl.columbia.edu, mykonos.cisl.columbia.edu, milos.cisl.columbia.edu, marathon.cisl.columbia.edu rhodes.cisl.columbia.edu, sparta.cisl.columbia.edu, aegina.cisl.columbia.edu, argos.cisl.columbia.edu, byzantium.cisl.columbia.edu, corinth.cisl.columbia.edu, cyrene.cisl.columbia.edu, laurium.cisl.columbia.edu, delphi.cisl.columbia.edu
Remote students need the ability to remotely run the design tools on our VLSI/CISL Teaching machines in Mudd 12th floor. This involves setting up an ssh connection to the machines and running an Xserver on your system. Instructions are at http://www.ee.columbia.edu/systems/x11.html
Some information on setting up Exceed with SSH can be found here (local copy).
Make sure your are confident you have a sufficiently fast internet connection (broadband). Make sure you understand the use of ssh & X11 before you register for this course as a remote student.
We will not be able to help you setting up that connection since it is too specific to your particular computing setup and internet connection.
Cadence tutorials from Prof. Shepard's EE4321 class
Manuals: All the cadence manuals are (only) available in electronic version. You can get the manual by issuing the command 'cdsdoc' or by hitting Help in some of the tools. The section under Analog IC design is of interest for this class.
Remark 1: These tutorials are using the hspice simulator; we will be using the Spectre and SpectreRF simulator. Make sure you select that simulator in Analog Artist under Setup -> Simulator.
Remark 2: These tutorials are using the TSMC 0.25um technology; we will be using a version of the TSMC 0.18um technology for this class; you will need to load a different model file as outlined below.
You need to include the tsmc 0.18u library in your cds.lib if you don't
see it when you run icfb for the first time. Add the following line to your
If you don't have a cds.lib file, put this one in your home directory and add the line in it.
Save the following model library file (spectre syntax) into your directory tree as TSMC018_teaching.scs and use it in Artist -> Set-up -> Models. This file only has a model for the regular 1.8V devices for a typical (section tt), slow (section ss), and fast (section ff) process corner.
This model file is based on data available on the internet at the MOSIS website (see file for details on how the model library was constructed). You can copy this model library to your own computer and use it to run simulations locally if you have a circuit simulator available.
Everyone should use this model library for their simulation assignments for this class! The following section is only for reference.
The files in /usr/tech/ cannot be copied due to non-disclosure restrictions! This applies to models, manuals, documentation or any other file in that directory tree.
Use the following model file in spectre for typical models:
|1.8V pMOS, nMOS regular devices||nch, pch||tt|
|3.3V pMOS, nMOS regular devices||nch3, pch3||tt_3v|
|1.8V zero Vt nMOS||nanch||tt_na|
|3.3V zero Vt nMOS||nanch3||tt_3vna|
|1.8V medium Vt nMOS||mench||tt_m|
|3.3V medium Vt nMOS||mench3||tt_3m|
Replace tt by ss for slow/slow or ff for fast/fast process corners.