Transconductance Linearization Techniques and Autonomic Biasing for Low Phase Noise VCOs

April 19, 2013
2:30pm-3:30pm
414 CEPSR
Hosted by: Columbia Integrated System Laboratory
Speaker: Dr. Bodhisatwa Sadhu , Post-doctoral Researcher (IBM T.J. Watson Research Center, NY)

Abstract

Phase noise in CMOS LC VCOs is fundamentally limited by the oscillation amplitude and the inherent device noise. This talk will describe a new approach based on transconductance linearization of the active devices that increases the signal swing while reducing the active device noise contribution in LC VCOs providing excellent phase noise performance. A prototype 25GHz VCO based on this linearization approach is integrated in a dual-path PLL and achieves superior performance compared to the state of the art. The design is implemented in 32nm SOI CMOS technology and achieves a phase noise of −130dBc/Hz at a 10MHz offset from a 22GHz carrier. A new layout approach for switched capacitor arrays enables a wide tuning range of 23%. Also, a digitally assisted autonomic biasing technique is implemented in the PLL to provide a phase noise and power optimized VCO bias across frequency and process. Measurement results to indicate the efficacy of the autonomic biasing scheme will be presented.

Speaker Biography

Bodhisatwa Sadhu is currently a Post-doctoral Researcher at IBM T.J. Watson Research Center, NY. He received his B.E.(Hons.) degree in Electrical and Electronics Engineering from Birla Institute of Technology and Science, Pilani, in 2007 and his Ph.D. degree in Electrical Engineering from the University of Minnesota, Minneapolis, in 2012. For his Ph.D., he worked on wideband circuits and architectures for software defined radio applications. In 2007, he was with Broadcom Corporation, Bangalore, where he worked on system integration and verification of ethernet switch SoCs. In Fall-2010 and Summer-2011, he was with the Mixed Signal Communications IC Design Group, IBM T.J. Watson Research Center where he worked on the analysis and design of low phase noise frequency synthesizers for 60GHz and 94GHz applications. Dr. Sadhu is the recipient of the University of Minnesota Graduate School Fellowship, 2007, 3M Science and Technology Fellowship, 2009 and the University of Minnesota Doctoral Dissertation Fellowship, 2011.


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