The SOC Transformation of the Microprocessor - Clocking and Analog Circuits in High Performance Processors

January 30, 2009
2:00pm-3:00pm
Davis Auditorium - 4th floor - CEPSR
Hosted by: Columbia Integrated System Laboratory (CISL)
Speaker: Dr. Ian Young, Intel Senior Fellow, Director of Advanced Circuit and Technology Integration

Abstract

The high performance microprocessor has become a digital logic and analog circuit mixed signal SOC. The use of analog circuits has enabled the microprocessor to achieve its highest performance. A major area of analog design innovation for each new generation of microprocessor has been Phase Locked Loop clock generators and balanced clock distribution networks since they were needed to provide a clock with low skew and jitter to the flip-flops or latches across the die. This talk will describe the evolution in the design of clock generators and clock distribution networks and the associated growth of analog circuits over the many generations of Intel microprocessors, beginning with the 50MHz Intel 80486, and going through to the 3.0 GHz Core 2 Duo architecture. The process technology challenges and network topology solutions will be presented. The complexity of analog circuit design on the microprocessor increased with the use of Delay Locked Loops and Phase Locked Loops for the high speed I/O clocking. Also the thermal sensor was an analog circuit that was added to monitor the die temperature and enabled microprocessor operation near the thermal limit of the die. An overview of the evolution of these circuits will be presented.


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