Principles of silicon mmWave PA design
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Date: 04-14-2009
Start Time:
11:00am
End Time: 12:00pm
Speaker: Dr. Alberto Valdes-Garcia
From:
IBM
Location: Interschool Lab, 7th Fl. CEPSR
Hosted by:
Prof. Krishnaswamy
Abstract
In the accelerating evolution of silicon mmWave systems, highly
integrated radios cable of multi-Gb/s transmission have already been
demonstrated. Nevertheless, efficient power generation at mmWave
frequencies using SiGe and CMOS devices is still a challenge. This
presentation will address important considerations for the
implementation of Power Amplifiers (PA) operating at 60GHz. Two
different single-stage PA examples will be used to illustrate design,
modeling, simulation and measurement concepts as well as challenges.
The first design is a 60GHz class-E PA in 0.13um SiGe BiCMOS. To
accomplish
switching-mode operation at 60GHz, the input impedance matching network
provides a low real source impedance rather than optimum power match.
Measurement results show a saturated output power >11.1dBm with peak
PAE>15% from 55-60GHz. The second design is a class-A PA in 65nm
CMOS. In this case, the focus is to understand the large signal
behavior of a deep-submicron FET devices in the 60GHz band over process
and temperature variations. The PA achieves output 1dB compression
point of 6dBm peak PAE of 8.5% at 62GHz.
Brief Bio
Alberto Valdes-Garcia received the B.S. in Electronic Systems
Engineering degree from the Monterrey Institute of Technology (ITESM),
Mexico in 1999 and the Ph.D. degree in Electrical Engineering from
Texas A&M University in 2006. In 2000 he was a Design Engineer with
Motorola, Broadband Communications. During his graduate studies he was
a Semiconductor Research Corporation (SRC) Research Assistant and held
internships with Agere Systems and IBM Research. Since January 2006 he
has been a Research Staff Member with the IBM T. J. Watson Research
Center. His present work is on silicon integrated millimeter-wave
communication systems and carbon electronics. He is a member of the
IEEE
802.15.3c 60GHz standardization committee and an Associate Editor of
the Journal of VLSI Design. He has authored or co-authored more than 30
peer-referred publications, and 3 book chapters. Dr. Valdes-Garcia is
the winner of the 2005 Best Doctoral Thesis Award presented by the IEEE
Test Technology Technical Council (TTTC), a co-recipient of an IBM
Corporate Outstanding Innovation Award and the recipient of the 2007
National Youth Award for Outstanding Academic Achievements presented by
the Goverment of Mexico.