Fleet, Infinity and Marina<-- Return to the list
Start Time: 11:00am
End Time: 12:00pm
Speaker: Ivan Sutherland (Portland State)
Location: Davis Auditorium (lobby level, CEPSR/Schapiro Building)
Hosted by: Prof. Steve Nowick (CS Department)
This talk describes a radically different architecture for computing called "Fleet". Fleet accepts the limitations to computing imposed by physics: moving data costs more energy, more delay, and more chip area than the arithmetic and logical operations ordinarily called "computing". Fleet puts the programmer firmly in charge of the most costly resource: communication. Fleet treats arithmetic and logical operations as side effects of where the programmer sends data.
Fleet achieves high performance through fine grain concurrency. Everything Fleet does is concurrent at the lowest level; programmers who wish sequential behavior must program it explicitly. Fleet presents a start contrast to today's multi-core machines in which programmers seek concurrency in an inherently sequential environment.
The Fleet architecture uses a uniform switch fabric to simplify chip design. A few thousand identical copies of configurable interface will connect a thousand or so repetitions of basic arithmetic, logical, input-output, and storage units to the switch fabric. The uniform switch fabric and the identical configurable interfaces will simplify many of the hard parts of designing the computing elements themselves.
Both software and FPGA simulators of a Fleet system are available at UC Berkeley. Berkley students have written a variety of Fleet programs; their work helped to define what the configurable interface between computing and communication must do. A simple compiler configures both source and destination to provide flow-controlled communication. We expect work on a higher-level language for Fleet to appear soon as a Berkeley PhD dissertation.
Last year we built a 90 nanometer TSMC test chip, called Infinity, at Sun Microsystems. Infinity demonstrated the switch fabric running at about 4 GHz. We now have a new test chip, called Marina, also in 90-nanometer TSMC sponsored by Sun. Marina shows correct operation of the configurable switch fabric interface. Together Infinity and Marina give us confidence to build a complete Fleet. We seek participation from sponsors, computer scientists and hardware designers.
(this work is joint with Adam Megacz, UC Berkeley)
Ivan is widely regarded as the founder of the fields of computer graphics and virtual reality. His PhD thesis, on "Sketchpad" (1963), proposed the first graphical user interface. He has also made fundamental contributions to the areas of object-oriented programming and modern VLSI design. He received the 1998 ACM Turing Award, and is a member of the National Academy of Engineering (NAE) and the National Academy of Sciences (NAS). He was chair of the CS department at Caltech, Vice President of Research at Sun Microsystems, and co-founder of Evans and Sutherland.
This talk is sponsored by the Computer Architecture Lecture Series of the Department of Computer Science (organized by Profs. Martha Kim and Simha Sethumadhavan).