Photonic Networks for Intra-Chip, Inter-Chip, and Box-to-Box Interconnects in High-Performance Computing
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Date: 12-04-2006
Start Time:
11:00am
End Time: 12:00pm
Speaker: Professor Keren Bergman
From:
Department of Electrical Engineering, Columbia University
Location: Interschool Lab, 750 Schapiro/CEPSR
Over the last decade advances in high-performance computing (HPC) have been largely driven by improved microprocessor speeds and functionality which have benefited from the continuous miniaturization of transistors. This trend is grinding to a halt as the semiconductor industry is experiencing a paradigm shift from “computation-bound design” to “communication-bound design”: the number of transistors that can be reached in a clock cycle, and not those that can be integrated on a chip, is now driving the design process. The processor–memory communication interconnect has become a key limitation to the growth of instruction throughput and is often the single most constraining bottleneck in overall system performance. Coupled with the associated exacerbated growth in power dissipation, the convergence of these critical trends has translated into an unmistakable commercial move towards more parallel and distributed chip architectures that host multiple processing cores. Clearly, within the next few years, performance gains will come from increases in the number of processor cores per chip and associated number of parallel functional units. One of the most important features of massively parallel HPC systems is the network that connects the processors together and allows the machine to operate as a single coherent entity.
Low latency, high data-rate interconnection networks have therefore become a key to relieving one of the main bottlenecks to HPC system performance. Photonic interconnection networks offer a potentially disruptive technology solution that can provide ultra-high throughput, minimal access latencies, and low power dissipation that remains independent of capacity. In this talk we will present the principles for photonic interconnection network design that address the challenges of achieving high-bandwidth low latency communications in HPC systems. The discussion will include system scale interconnects, inter-chip, as well as possible applications to intra-chip networks that employ nanophotonic technologies.
Biography:
Keren Bergman is a Professor of Electrical Engineering at Columbia University where she also directs the Lightwave Research Laboratory. Dr. Bergman received the B.S. from Bucknell University in 1988, and the M.S. in 1991 and Ph.D. in 1994 from M.I.T. all in Electrical Engineering. From 1994 to 2000, she was an Assistant Professor in the Department of Electrical Engineering at Princeton University. She then joined the optical networking group at Tellium where she headed the optical design of large-scale MEMS based cross-connects. Since 2001, Dr. Bergman has been at Columbia University where she leads multiple research projects in optical packet switched networks, distributed grid computing over optical networks, photonic interconnection networks, nanophotonic networks-on-chip, and the applications of optical networking in high-performance computing systems. She currently serves as Senior Technical Advisor to the National Security Agency and is leading the Interconnect Thrust of the NSA’s Advanced Computing Systems research initiative. Dr. Bergman is a recipient of the National Science Foundation CAREER award in 1995 and the Office of Naval Research Young Investigator in 1996. In 1997 she received the CalTech President’s Award for joint work with JPL on optical packet networks. Dr. Bergman is a member of IEEE and a fellow of OSA. She is currently Associate Editor for IEEE Photonic Technology Letters and the OSA Journal of Optical Networking.(insert text here)